ELECTRA IC has taken many roles from system design down to sign-off for tape-out in ASIC projects. Some examples are WiFi, BT, ADSL.
Requirements tracing during the whole ASIC design flow
Random Tests using SystemVerilog / UVM
STA for hand-off to backend team or sign-off for tape-out
FPGA prototyping for your ASIC
Supply Chain Management: We have the right contacts all over the world to place your design in an MPW or a similar cost-effective solution.
We can help you to build your IP or VIP. You will keep all the IP/VIP rights.
Having used many major ASIC and FPGA tools on the market for years, we have been in many tool evaluation projects. We can offload this tedious work from you and can evaluate a tool taking into account your requirements. We can generate professional scorecards such that you can compare different tools easily.
Having worked with many multinational global semiconductor companies, we have been in many make-it or buy-it decision processes. We know how to evaluate an IP and can do that for you taking into account your project needs.