Our team working on IC Design & Verification Projects is expanding. For our global IC design projects, we are looking for an ASIC Design Engineer with previous IC design and verification skills to join our expanding team.
Support in the preparation micro-architecture documents and verification plans with respect to customer requirements
Participate in design reviews and recommend improvements
RTL Coding, RTL Simulation
Develop a design verification environment and implement standard debug flows
BS or MS (preferred) in EE or equivalent experience.
Experience with digital ASIC/SOC design flow from RTL to silicon characterization.
Expertise in RTL and/or testbench development using at least one of the HDLs. (VHDL/Verilog/SystemVerilog)
Ability to understand project specifications and come up with a comprehensive set of requirements and develop verification test-plans
Experience debugging RTL designs using an HDL simulator
Familiar with code base management method including subversion, git, GitHub, etc.
Familiar with Synopsys and Cadence EDA tools for Simulation, Synthesis, Timing (STA), Formal and Assertion based verification, etc.
Working knowledge of Linux and Windows
Excellent communication skills both verbal and written for documentation and reporting