The EIC Academy Engineer Training Programme is a probation period programme for new recruits.
A group of 6 to 10 new engineers goes through an 8-week intensive programme, which includes:
Candidates must pass the overall assessments to successfully complete the training.
The programme is sponsored by Doulos and contains 4 complete Doulos courses:
Thanks also to Siemens EDA, QuestaSim Prime and QVIPs are used extensively throughout this programme.
Candidates gain experience of using professional RTL simulation tools and Verification IPs.
Please click here to view and download EIC Academy brochure in PDF format.
| DIGITAL DESIGN AND VHDL | |
|---|---|
| WK1 | Digital Design and VHDL Training |
| WK2 | Design with VHDL |
| WK3 | Verification with VHDL |
| WK4 | Verification and FPGA Board Validation |
| SYSTEM VERILOG AND UVM | |
|---|---|
| WK5 | SystemVerilog Training |
| WK6 | UVM Training and Practice |
| WK7 | Verification Using VIPs |
| WK8 | Documentation in Verification |
