Guarantee high reliability RTL with the Visual Verification Suite Management Dashboard.The Blue Pearl Management Dashboard delivers real-time visibility to ASIC, FPGA and IP RTL design rule and CDC checks to better assess schedules, risk and overall design quality.
This standalone option to the Visual Verification Suite, provides RTL Designers, Verification Engineers and Managers visual insight into the RTL verification progress, run to run, providing graphical reports on the number of fixed and outstanding Messages, Clock Domain Crossing issues and Waivers. The Design Sign off dashboard can be customized to ensure the code has been analyzed and has passed all user defined mandatory checks.
These graphical reports, generated for both GUI and Tcl flows, can be customized and exported for use in documentation and design reviews.
For more information, contact sales@electraic.com