SHA3 IP Cores perform cryptographic hashing in compliance with the SHA-3 (Secure Hash Algorithm 3) specifications defined in 'FIPS 202'. This standard specifies methods for generating secure hash values using the SHA-3 algorithm. 

SHA3 IP Cores support the SHA3-224, SHA3-256, SHA3-384, SHA3-512, SHAKE128, and SHAKE256 functions, and are byte-oriented in their implementation. VHDL is used as the Hardware Description Language of the IP Core. AXI4-Stream interface can be designed and provided upon request.

FEATURE LIST

• supports hashing for functions listed below:
  • SHA3-224
  • SHA3-256
  • SHA3-384
  • SHA3-512
  • SHAKE128
  • SHAKE256
• is compliant with FIPS 202.
• has fully stallable input and output interfaces.

DELIVERABLES

• Encrypted Netlist
• Synthesis Scripts
• Comprehensive Documentation
• SHA3 Validation SystemTestbenches in SystemVerilog

LICENSING
A one-time license fee is paid with the initial IP purchase. 

• Single project license
• Multi project license

MAINTENANCE & SUPPORT

• M&S fee of 15% is mandatory for the first year. 
• Telephone and email support is included under M&S contract.
• IP Core updates are included in M&S.

ORDERING
Purchase order shall include the product number EIP-13009.
 

For more information, contact sales@electraic.com 

DOCUMENTS

SHA3-IP-Core-Datasheet

Crypto IP Cores - Feature List Table