The Blue Pearl Software Suite offers the capability to analyze ASIC and FPGA designs for Clock Domain Crossing (CDC) issues:
- Finds places in design that don’t have CDC synchronization that cause metastability
- Identifies CDC synchronization types
- Has IP block modeling capability that reduces complexity and accommodates lack of model availability
- Has reports and schematic to understand and debug CDC synchronization
- Easy setup by identifying clocks and FPGA clock generators.
- CDC is an option to Analyze RTL™, the base product within the software suite.