The session explored advanced methodologies for modeling, verification, and simulation of Open RAN Radio Units (O-RUs), featuring practical examples based on an AMD Zynq UltraScale+ RFSoC DFE reference design.
The webinar was presented by Anthony Collins (AMD) and Murat Bostanoğlu (ElectraIC), who shared their expertise on verification methodologies, digital twin development, and simulation workflows used in modern Open RAN systems.
Topics Covered During the Webinar
The session included discussions on:
Participants gained valuable insights into how system-level models and RTL implementations can be validated together, how digital twin methodologies can improve development efficiency, and how simulation-driven verification can help accelerate Open RAN product development.
A Practical Approach to Open RAN Verification
A key focus of the webinar was the role of model-based design, digital twin technology, and automated verification techniques in the development of next-generation Open RAN systems.
Through practical examples and demonstrations, attendees learned how MATLAB-based models can be used alongside RTL designs to improve system accuracy, reduce development risks, and streamline validation activities throughout the development lifecycle.
Watch the Recording
For those who were unable to attend the live session, the webinar recording is now available.
To access the recording, simply complete the registration form.
We would like to thank everyone who joined the webinar and contributed to the discussion. We look forward to welcoming you to future AMD and ElectraIC technical webinars covering FPGA, RFSoC, AI, communications systems, and advanced embedded technologies.
